What is Clock Skew ? The Positive and Negative Clock Skew Explained
In this video, what is clock skew, and how it affects the performance of the synchronous digital circuits is explained through an example. The video also explains the positive and the negative clock skew, and the effect of both types of clock skews on the digital circuits.
The following topics are covered in the video:
0:00 What is Clock Skew and why Clock Skew occurs?
1:51 Revision of Setup Time and Hold Time related timing constraints in the Synchronous Digital Circuits
6:51 Positive and Negative Clock Skew
8:18 Timing Analysis When Clock Skew is Positive
12:02 Timing Analysis When Clock Skew is Negative
14:47 How to minimize the Clock Skew
The link for the other useful videos related to Synchronous digital circuits.
1) What is Setup Time and Hold Time?
• Setup Time and Hold Time of Flip Flop...
2) Sequential Circuits (Playlist)
• Sequential Circuits
What is Clock Skew
In Synchronous Digital Circuits, the different parts of circuits are receiving the clock at different times. The difference between the timing arrival of the clock signal to the different parts of the digital circuit is known as the clock skew.
There are two types of Clock Skews:
1) Positive Clock Skew
2) Negative Clock Skew
In this video, through an example, both types of clock skews and their effect on the synchronous digital circuit are explained.
This video will be helpful to all the students of science and engineering in understanding What is Clock Skew and the effect of Clock Skew on Synchronous Digital Circuits.
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