MIPSfpga - Module 4: Creating a MIPSfpga Vivado Project
In this series, Sarah Harris, a professor in Electrical & Computer Engineering at UNLV, explores the MIPSfpga soft-core processor from its introduction through to advanced topics. In this module:
• Create a new Vivado project
• Add MIPSfpga Verilog files
• Add clock (PLL or MMCM)
• Simulate
• Compile
• Download bitstream onto board
For more resources:
https://www.mips.com/mac/resources/
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